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| 19-2548; Rev 0; 7/02 KIT ATION EVALU ABLE AVAIL 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan General Description The MAX6955 is a compact display driver that interfaces microprocessors to a mix of 7-segment, 14-segment, and 16-segment LED displays through an I2CTM-compatible 2-wire serial interface. The MAX6955 drives up to 16 digits 7-segment, 8 digits 14-segment, 8 digits 16-segment, or 128 discrete LEDs, while functioning from a supply voltage as low as 2.7V. The driver includes five I/O expander or general-purpose I/O (GPIO) lines, some or all of which can be configured as a key-switch reader. The key-switch reader automatically scans and debounces a matrix of up to 32 switches. Included on chip are full 14- and 16-segment ASCII 104-character fonts, a hexadecimal font for 7-segment displays, multiplex scan circuitry, anode and cathode drivers, and static RAM that stores each digit. The maximum segment current for the display digits is set using a single external resistor. Digit intensity can be independently adjusted using the 16-step internal digital brightness control. The MAX6955 includes a low-power shutdown mode, a scan-limit register that allows the user to display from 1 to 16 digits, segment blinking (synchronized across multiple drivers, if desired), and a test mode, which forces all LEDs on. The LED drivers are slew-rate limited to reduce EMI. For an SPITM-compatible version, refer to the MAX6954 data sheet. An evaluation kit* (EV kit) for the MAX6955 is available. *Future product--contact factory for availability. Features o 400kbps 2-Wire Interface Compatible with I2C o 2.7V to 5.5V Operation o Drives Up to 16 Digits 7-Segment, 8 Digits 14-Segment, 8 Digits 16-Segment, 128 Discrete LEDs, or a Combination of Digit Types o Drives Common-Cathode Monocolor and Bicolor LED Displays o Built-In ASCII 104-Character Font for 14-Segment and 16-Segment Digits and Hexadecimal Font for 7-Segment Digits o Automatic Blinking Control for Each Segment o 10A (typ) Low-Power Shutdown (Data Retained) o 16-Step Digit-by-Digit Digital Brightness Control o Display Blanked on Power-Up o Slew-Rate-Limited Segment Drivers for Lower EMI o Five GPIO Port Pins Can Be Configured as KeySwitch Reader to Scan and Debounce Up to 32 Switches with n-Key Rollover o IRQ Output when a Key Input is Debounced o 36-Pin SSOP and 40-Pin DIP Packages o Automotive Temperature Range Standard MAX6955 Functional Diagram GPIO AND KEY-SCAN CONTROL ISET CURRENT SOURCE PWM BRIGHTNESS CONTROL DIGIT MULTIPLEXER P0 TO P4 Applications Set-Top Boxes Panel Meters White Goods Automotive Bar Graph Displays Audio/Video Equipment OSC LED DRIVERS O0 TO O18 Ordering Information PART MAX6955AAX MAX6955APL TEMP RANGE -40C to +125C -40C to +125C PIN-PACKAGE 36 SSOP 40 PDIP OSC_OUT DIVIDER/ COUNTER NETWORK MAX6955 CHARACTER GENERATOR ROM BLINK BLINK CONTROL Pin Configurations and Typical Operating Circuits appear at end of data sheet. I2C is a trademark of Philips Corp. SPI is a trademark of Motorola, Inc. SCL AD0 AD1 SDA RAM CONFIGURATION REGISTER 2-WIRE SERIAL INTERFACE ________________________________________________________________ Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 ABSOLUTE MAXIMUM RATINGS Voltage (with Respect to GND) V+ .........................................................................-0.3V to +6V SCL, SDA, AD0, AD1 ...........................................-0.3V to +6V All Other Pins............................................-0.3V to (V+ + 0.3V) Current O0-O7 Sink Current ......................................................935mA O0-O18 Source Current .................................................55mA SCL, SDA, AD0, AD1, BLINK, OSC, OSC_OUT, ISET ....20mA P0, P1, P2, P3, P4 ...........................................................40mA GND .....................................................................................1A Continuous Power Dissipation (TA = +70C) 36-Pin SSOP (derate at 11.8mW/C above +70C) .....941mW 40-Pin PDIP (derate at 16.7mW/C above +70C).....1333mW Operating Temperature Range (TMIN to TMAX) ...............................................-40C to +125C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS (Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1) PARAMETER Operating Supply Voltage Shutdown Supply Current SYMBOL V+ ISHDN Shutdown mode, all digital inputs at V+ or GND TA = +25C TA = TMIN to TMAX 22 CONDITIONS MIN 2.7 10 TYP MAX 5.5 35 A 40 30 mA 35 UNITS V Operating Supply Current I+ All segments on, all TA = +25C digits scanned, intensity set to full, internal oscillator, no display or OSC_OUT TA = TMIN to TMAX load connected OSC = RC oscillator, RSET = 56k, CSET = 22pF, V+ = 3.3V OSC driven externally 1 Master Clock Frequency Dead Clock Protection Frequency OSC Internal/External Detection Threshold OSC High Time OSC Low Time Slow Segment Blink Period Fast Segment Blink Period Fast or Slow Segment Blink Duty Cycle fOSC fOSC VOSC tCH tCL 4 8 95 1.7 50 50 1 0.5 49.5 50.5 MHz kHz V ns ns s s % OSC = RC oscillator, RSET = 56k, fSLOWBLINK C SET = 22pF, V+ = 3.3V fFASTBLINK OSC = RC oscillator, RSET = 56k, CSET = 22pF, V+ = 3.3V 2 _______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan DC ELECTRICAL CHARACTERISTICS (continued) (Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1) PARAMETER SYMBOL VLED = 2.2V, V+ = 3.3V Segment Drive Source Current ISEG VLED = 2.2V, V+ = 2.7V TA = +25C -32 -40 -48 mA CONDITIONS MIN TYP MAX UNITS MAX6955 Segment Current Slew Rate Segment Drive Current Matching LOGIC INPUTS AND OUTPUTS Input High Voltage SDA, SCL, AD0, AD1 Input Low Voltage SDA, SCL, AD0, AD1 Input Leakage Current SDA, SCL, AD0, AD1, OSC, P0, P1, P2, P3, P4 SDA Output Low Voltage Port Logic-High Input Voltage P0, P1, P2, P3, P4 Port Logic-Low Input Voltage P0, P1, P2, P3, P4 Port Hysteresis Voltage P0, P1, P2, P3, P4 Port Input Pullup Current from V+ Port Output Low Voltage Blink Output Low Voltage OSC_OUT Output High Voltage OSC_OUT Output Low Voltage ISEG/t ISEG TA = +25C, V+ = 3.3V TA = +25C, V+ = 3.3V 0.7 x V+ 11 5 mA/s % VIH VIL V 0.3 x V+ V IIH, IIL VOLSDA VIHP VILP VIP IIPU VOLP VOLBK VOHOSC VOLOSC P0 to P3 configured as key-scan inputs, V+ = 3.3V ISINK = 8mA ISINK = 0.6mA ISOURCE = 1.6mA ISINK = 1.6mA ISINK = 6mA -1 +1 0.4 A V V 0.7 x V+ 0.3 x V+ 0.03 x V+ 75 0.3 0.1 V+ 0.4 0.4 0.5 0.3 V V A V V V V _______________________________________________________________________________________ 3 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 TIMING CHARACTERISTICS (Typical Operating Circuit, V+ = 2.7V to 5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 1) PARAMETER TIMING CHARACTERISTICS Serial Clock Frequency Bus Free Time Between a STOP and a START Condition Hold Time (Repeated) START Condition Repeated START Condition Setup Time STOP Condition Setup Time Data Hold Time Data Setup Time SCL Clock Low Period SCL Clock High Period Rise Time of Both SDA and SCL Signals, Receiving Fall Time of Both SDA and SCL Signals, Receiving Fall Time of SDA Transmitting Pulse Width of Spike Suppressed Capacitive Load for Each Bus Line fSCL tBUF tHD, tSTA tSU, tSTA tSU:STO tHD, tDAT tSU, tDAT tLOW tHIGH tR tF t F , tX tSP CB (Notes 2, 4) (Notes 2, 4) (Notes 2, 5) (Notes 2, 6) (Note 2) 0 400 (Note 3) 100 1.3 0.6 20 + 0.1CB 20 + 0.1CB 20 + 0.1CB 300 300 300 50 1.3 0.6 0.6 0.6 0.9 400 kHz s s s s s ns s s ns ns ns ns pF SYMBOL CONDITIONS MIN TYP MAX UNITS Note 1: All parameters tested at TA = +25C. Specifications over temperature are guaranteed by design. Note 2: Guaranteed by design. Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL- of the SCL signal) in order to bridge the undefined region of SCL's falling edge. Note 4: CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+. Note 5: ISINK 6mA. CB = total capacitance of one bus line in pF. tR and tF measured between 0.3V+ and 0.7V+. Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns. 4 _______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Typical Operating Characteristics (V+ = 3.3V, LED forward voltage = 2.4V, Typical Application Circuit, TA = +25C, unless otherwise noted.) INTERNAL OSCILLATOR FREQUENCY vs. TEMPERATURE MAX6955 toc01 INTERNAL OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE RSET = 56k CSET = 22pF 4.2 MAX6955 toc02 INTERNAL OSCILLATOR WAVEFORM AT OSC AND OSC_OUT PINS MAX6954 toc03 4.4 OSCILLATOR FREQUENCY (MHz) RSET = 56k CSET = 22pF 4.2 4.4 OSCILLATOR FREQUENCY (MHz) RSET = 56k CSET = 22pF OSC 4.0 4.0 0V 3.8 3.8 OSC_OUT 0V 3.6 -40 -10 20 50 80 110 TEMPERATURE (C) 3.6 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 100ns/div OSC: 500mV/div OSC_OUT: 2V/div DEAD CLOCK OSCILLATOR FREQUENCY vs. SUPPLY VOLTAGE RSET = 56k CSET = GND MAX6955 toc04 SEGMENT SOURCE CURRENT vs. SUPPLY VOLTAGE MAX6955 toc05 WAVEFORM AT PINS O0 AND O18, MAXIMUM INTENSITY MAX6954 toc06 110 OSCILLATOR FREQUENCY (MHz) 105 100 95 90 85 80 2.5 3.0 3.5 4.0 4.5 5.0 1.02 CURRENT NORMALIZED TO 40mA 1.00 O0 0.98 0V 0.96 0.94 VLED = 1.8V 0.92 O18 0V 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) 1V/div 200s/div 5.5 SUPPLY VOLTAGE (V) GPIO SINK CURRENT vs. TEMPERATURE MAX 6955 toc07 PORT INPUT PULLUP CURRENT vs. TEMPERATURE OUTPUT = HIGH VPORT = 1.4V 0.4 VCC = 5.5V 0.3 MAX6955 toc08 KEY-SCAN OPERATION (KEY_A AND IRQ) MAX6954 toc09 45 40 GPIO SINK CURRENT (mA) 35 30 25 20 15 10 5 0 -40 -10 20 50 80 110 TEMPERATURE (C) VCC = 3.3V VCC = 2.5V VCC = 5.5V OUTPUT = LOW VPORT = 0.6V 0.5 KEY-SCAN SOURCE CURRENT (mA) KEY_A 0.2 VCC = 3.3V 0.1 VCC = 2.5V 0V IRQ 0V 0 -40 -10 20 50 80 110 TEMPERATURE (C) 400s/div KEY_A: 1V/div IRQ: 2V/div _______________________________________________________________________________________ 5 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Pin Description PIN SSOP 1, 2, 34, 35, 36 3 4 5 6 PDIP 1, 2, 38, 39, 40 3 4 5 6 NAME FUNCTION General-Purpose I/O Ports (GPIOs). GPIO can be configured as logic inputs or open-drain outputs. Enabling key scanning configures some or all ports P0-P3 as key-switch matrix inputs with internal pullup and port P4 as IRQ output. Address Input 0. Sets device slave address. Connect to GND, V+, SCL, or SDA to give four logic combinations. See Table 5. I2C-Compatible Serial Data I/O I2C-Compatible Serial Clock Input Address Input 1. Sets device slave address. Connect to GND, V+, SCL, or SDA to give four logic combinations. See Table 5. Digit/Segment Drivers. When acting as digit drivers, outputs O0 to O7 sink current from the display common cathodes. When acting as segment drivers, O0 to O18 source current to the display anodes. O0 to O18 are high impedance when not being used as digit or segment drivers. Ground Segment Current Setting. Connect ISET to GND through series resistor RSET to set the peak current. Positive Supply Voltage. Bypass V+ to GND with a 47F bulk capacitor and a 0.1F ceramic capacitor. Multiplex Clock Input. To use internal oscillator, connect capacitor CSET from OSC to GND. To use external clock, drive OSC with a 1MHz to 8MHz CMOS clock. Blink Clock Output. Output is open drain. Clock Output. OSC_OUT is a buffered clock output to allow easy blink synchronization of multiple MAX6955s. Output is push-pull. Not Internally Connected P0-P4 AD0 SDA SCL AD1 7-15, 22-31 16, 18 17 19, 21 20 32 33 -- 7-15, 26-35 17, 18, 20 19 21, 23, 24 22 36 37 16, 25 O0-O18 GND ISET V+ OSC BLINK OSC_OUT N.C. Detailed Description The MAX6955 is a serially interfaced display driver that can drive up to 16 digits 7-segment, 8 digits 14-segment, 8 digits 16-segment, 128 discrete LEDs, or a combination of these display types. Table 1 shows the drive capability of the MAX6955 for monocolor and bicolor displays. The MAX6955 includes 104-character ASCII font maps for 14-segment and 16-segment displays, as well as the hexadecimal font map for 7-segment displays. The characters follow the standard ASCII font, with the addition of the following common symbols: , , , , , , , and . Seven bits represent the 104-character font map; an 8th bit is used to select whether the decimal point (DP) is lit. Seven-segment LED digits can be controlled directly or use the hexadecimal font. Direct seg- ment control allows the MAX6955 to be used to drive bar graphs and discrete LED indicators. Tables 2, 3, and 4 list the connection schemes for 16-, 14-, and 7-segment digits, respectively. The letters in Tables 2, 3, and 4 correspond to the segment labels shown in Figure 1. (For applications that require mixed display types, see Tables 38-41.) Serial Interface Serial Addressing The MAX6955 operates as a slave that sends and receives data through an I2C-compatible 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and 6 _______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 1a 2a a a1 a2 1f 1b 2f 2b f h i j b f h i j b 1g 2g g1 g2 g1 g2 1e 1c 1dp 1d 2e 2c 2dp 2d e m l k c dp e m l k c dp d d1 d2 Figure 1. Segment Labeling for 7-Segment Display, 14-Segment Display, and 16-Segment Display Table 1. MAX6955 Drive Capability DISPLAY TYPE Monocolor Bicolor 7 SEGMENT (16-CHARACTER HEXADECIMAL FONT) 16 8 14 SEGMENT/ 16 SEGMENT (104-CHARACTER ASCII FONT MAP) 8 4 DISCRETE LEDs (DIRECT CONTROL) 128 64 from the MAX6955, and generates the SCL clock that synchronizes the data transfer (Figure 2). The MAX6955 SDA line operates as both an input and an open-drain output. A pullup resistor, typically 4.7k, is required on the SDA. The MAX6955 SCL line operates only as an input. A pullup resistor, typically 4.7k, is required on SCL if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition (Figure 3) sent by a master, followed by the MAX6955 7-bit slave address plus R/W bit (Figure 4), a register address byte, 1 or more data bytes, and finally a STOP condition (Figure 3). Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning the SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 3). Bit Transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable while SCL is high (Figure 5). Acknowledge The acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (Figure 6). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX6955, the MAX6955 generates the acknowledge bit because the MAX6955 is the recipient. When the MAX6955 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. Slave Address The MAX6955 has a 7-bit-long slave address (Figure 4). The eighth bit following the 7-bit slave address is the R/W bit. It is low for a write command, high for a read command. The first 3 bits (MSBs) of the MAX6955 slave address are always 110. Slave address bits A3, A2, A1, and A0 are selected by the address input pins AD1 and AD0. These two input pins can be connected to GND, V+, SDA, or SCL. The MAX6955 has 16 possible slave addresses (Table 5) and therefore a maximum of 16 MAX6955 devices can share the same interface. _______________________________________________________________________________________ 7 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 2. Connection Scheme for Eight 16-Segment Digits DIGIT O0 0 1 2 3 4 5 6 7 CCO -- a1 a1 a1 a1 a1 a1 O1 -- CC1 a2 a2 a2 a2 a2 a2 O2 a1 a1 CC2 -- b b b b O3 a2 a2 -- CC3 c c c c O4 b b b b CC4 -- d1 d1 O5 c c c c -- CC5 d2 d2 O6 d1 d1 d1 d1 d1 d1 CC6 -- O7 d2 d2 d2 d2 d2 d2 -- CC7 O8 e e e e e e e e O9 f f f f f f f f O10 g1 g1 g1 g1 g1 g1 g1 g1 O11 g2 g2 g2 g2 g2 g2 g2 g2 O12 h h h h h h h h O13 i i i i i i i i O14 j j j j j j j j O15 k k k k k k k k O16 l l l l l l l l O17 m m m m m m m m O18 dp dp dp dp dp dp dp dp Table 3. Connection Scheme for Eight 14-Segment Digits DIGIT O0 0 1 2 3 4 5 6 7 CCO -- a a a a a a O1 -- CC1 -- -- -- -- -- -- O2 a a CC2 -- b b b b O3 -- -- -- CC3 c c c c O4 b b b b CC4 -- d d O5 c c c c -- CC5 -- -- O6 d d d d d d CC6 -- O7 -- -- -- -- -- -- -- CC7 O8 e e e e e e e e O9 f f f f f f f f O10 g1 g1 g1 g1 g1 g1 g1 g1 O11 g2 g2 g2 g2 g2 g2 g2 g2 O12 h h h h h h h h O13 i i i i i i i i O14 j j j j j j j j O15 k k k k k k k k O16 l l l l l l l l O17 m m m m m m m m O18 dp dp dp dp dp dp dp dp Table 4. Connection Scheme for Sixteen 7-Segment Digits DIGIT O0 0, 0a CC0 1, 1a 2, 2a 3, 3a 4, 4a 5, 5a 6, 6a 7, 7a -- 1a 1a 1a 1a 1a 1a O1 -- CC1 -- -- -- -- -- -- O2 1a 1a CC2 -- 1b 1b 1b 1b O3 -- -- -- CC3 1c 1c 1c 1c O4 1b 1b 1b 1b CC4 -- 1d 1d O5 1c 1c 1c 1c -- CC5 1dp 1dp O6 1d 1d 1d 1d 1d 1d CC6 -- O7 1dp 1dp 1dp 1dp 1dp 1dp -- CC7 O8 1e 1e 1e 1e 1e 1e 1e 1e O9 1f 1f 1f 1f 1f 1f 1f 1f O10 1g 1g 1g 1g 1g 1g 1g 1g O11 2a 2a 2a 2a 2a 2a 2a 2a O12 2b 2b 2b 2b 2b 2b 2b 2b O13 2c 2c 2c 2c 2c 2c 2c 2c O14 2d 2d 2d 2d 2d 2d 2d 2d O15 2e 2e 2e 2e 2e 2e 2e 2e O16 2f 2f 2f 2f 2f 2f 2f 2f O17 2g 2g 2g 2g 2g 2g 2g 2g O18 2dp 2dp 2dp 2dp 2dp 2dp 2dp 2dp Message Format for Writing A write to the MAX6955 comprises the transmission of the MAX6955's slave address with the R/W bit set to zero, followed by at least 1 byte of information. The first byte of information is the command byte, which determines which register of the MAX6955 is to be written by the next byte, if received. If a STOP condition is detected after the command byte is received, then the MAX6955 takes no further action (Figure 7) beyond storing the command byte. 8 Any bytes received after the command byte are data bytes. The first data byte goes into the internal register of the MAX6955 selected by the command byte (Figure 8). If multiple data bytes are transmitted before a STOP condition is detected, these bytes are generally stored in subsequent MAX6955 internal registers because the command byte address generally autoincrements (Table 6) (Figure 9). _______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 SDA tSU, DAT tLOW SCL tHIGH tHD, STA tR START CONDITION tF REPEATED START CONDITION STOP CONDITION START CONDITION tHD, DAT tSU, STA tHD, STA tSU, STO tBUF Figure 2. 2-Wire Serial Interface Timing Details SDA SCL S START CONDITION P STOP CONDITION Figure 3. Start and Stop Conditions SDA 1 1 0 A3 A2 A1 A0 R/W ACK START SCL MSB LSB Figure 4. Slave Address _______________________________________________________________________________________ 9 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 5. MAX6955 Address Map PIN CONNECTION AD1 GND GND GND GND V+ V+ V+ V+ SDA SDA SDA SDA SCL SCL SCL SCL AD0 GND V+ SDA SCL GND V+ SDA SCL GND V+ SDA SCL GND V+ SDA SCL A6 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 DEVICE ADDRESS A4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Operation with Multiple Masters If the MAX6955 is operated on a 2-wire interface with multiple masters, a master reading the MAX6955 should use a repeated start between the write, which sets the MAX6955's address pointer, and the read(s) that takes the data from the location(s). This is because it is possible for master 2 to take over the bus after master 1 has set up the MAX6955's address pointer but before master 1 has read the data. If master 2 subsequently changes the MAX6955's address pointer, then master 1's delayed read may be from an unexpected location. Command Address Autoincrementing Address autoincrementing allows the MAX6955 to be configured with the shortest number of transmissions by minimizing the number of times the command byte needs to be sent. The command address or the font pointer address stored in the MAX6955 generally increments after each data byte is written or read (Table 6). Digit Type Registers The MAX6955 uses 32 digit registers to store the characters that the user wishes to display. These digit registers are implemented with two planes, P0 and P1. Each digit is represented by 2 bytes of memory, 1 byte in plane P0 and the other in plane P1. The digit registers are mapped so that a digit's data can be updated in plane P0, plane P1, or both planes at the same time (Table 7). If the blink function is disabled through the Blink Enable Bit E (Table 20) in the configuration register, then the digit register data in plane P0 is used to multiplex the display. The digit register data in P1 is not used. If the blink function is enabled, then the digit register data in both plane P0 and plane P1 are alternately used to multiplex the display. Blinking is achieved by multiplexing the LED display using data plane P0 and plane P1 on alternate phases of the blink clock (Table 21). The data in the digit registers does not control the digit segments directly for 14- and 16-segment displays. Instead, the register data is used to address a character generator that stores the data for the 14- and 16- Message Format for Reading The MAX6955 is read using the MAX6955's internally stored command byte as address pointer, the same way the stored command byte is used as address pointer for a write. The pointer generally autoincrements after each data byte is read using the same rules as for a write (Table 6). Thus, a read is initiated by first configuring the MAX6955's command byte by performing a write (Figure 7). The master can now read n consecutive bytes from the MAX6955, with the first data byte being read from the register addressed by the initialized command byte (Figure 9). When performing read-after-write verification, reset the command byte's address because the stored byte address generally is autoincremented after the write (Table 6). Table 6. Command Address Autoincrement Rules COMMAND BYTE ADDRESS RANGE x0000000 to x0001100 x0001101 x0001111 to x1111110 x1111111 AUTOINCREMENT BEHAVIOR Command byte address autoincrements after byte read or written. Factory reserved; do not write this register. Command byte address autoincrements after byte read or written. Command byte address remains at x1111111 after byte read or written. 10 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan segment fonts (Tables 8 and 9). The lower 7 bits of the digit data (D6 to D0) select the character from the font. The most significant bit of the register data (D7) controls the DP segment of the digits; it is set to 1 to light DP, and to zero to leave DP unlit (Table 10). For 7-segment displays, the digit plane data register can be used to address a character generator, which contains the data of a 16-character font containing the hexadecimal font. The decode mode register can be used to disable the character generator and allow the segments to be controlled directly. Table 11 shows the one-to-one pairing of each data bit to the appropriate segment line in the digit plane data registers. The hexadecimal font is decoded according to Table 12. The digit-type register configures the display driver for various combinations of 14-segment digits, 16-segment digits, and/or pairs, or 7-segment digits. The function of this register is to select the appropriate font for each digit and route the output of the font to the appropriate MAX6955 driver output pins. The MAX6955 has four digit drive slots. A slot can be filled with various combinations of monocolor and bicolor 16-segment displays, 14-segment displays, or two 7-segment displays. Each pair of bits in the register corresponds to one of the four digit drive slots, as shown in Table 13. Each bit also corresponds to one of the eight common-cathode digit drive outputs, CC0 to CC7. When using bicolor digits, the anode connections for the two digits within a slot are always the same. This means that a slot correctly drives two monocolor or one bicolor 14- or 16-segment digit. The digit type register can be written, but cannot be read. Examples of configuration settings required for some display digit combinations are shown in Table 14. data for any digit is different in the two planes, then that digit appears to flip between two characters. To make a character appear to blink on or off, write the character to one plane, and use the blank character (0x20) for the other plane. Once blinking has been configured, it continues automatically without further intervention. MAX6955 Blink Speed The blink speed is determined by the frequency of the multiplex clock, OSC, and by the setting of the Blink Rate Selection Bit B (Table 19) in the configuration register. The Blink Rate Selection Bit B sets either fast or slow blink speed for the whole display. Initial Power-Up On initial power-up, all control registers are reset, the display is blanked, intensities are set to minimum, and shutdown is enabled (Table 16). Configuration Register The configuration register is used to enter and exit shutdown, select the blink rate, globally enable and disable the blink function, globally clear the digit data, select between global or digit-by-digit control of intensity, and reset the blink timing (Tables 17-20 and 22-25). The configuration register contains 7 bits: * S bit selects shutdown or normal operation (read/write). * B bit selects the blink rate (read/write). * E bit globally enables or disables the blink function (read/write). * T bit resets the blink timing (data is not stored--transient bit). * R bit globally clears the digit data for both planes P0 and P1 for ALL digits (data is not stored--transient bit). * I bit selects between global or digit-by-digit control of intensity (read/write). * P bit returns the current phase of the blink timing (read only--a write to this bit is ignored). 7-Segment Decode-Mode Register In 7-segment mode, the hexadecimal font can be disabled (Table 15). The decode-mode register selects between hexadecimal code or direct control for each of eight possible pairs of 7-segment digits. Each bit in the register corresponds to one pair of digits. The digit pairs are {digit 0, digit 0a} through {digit 7, digit 7a}. Disabling decode mode allows direct control of the 16 LEDs of a dual 7-segment display. Direct control mode can also be used to drive a matrix of 128 discrete LEDs. A logic high selects hexadecimal decoding, while a logic low bypasses the decoder. When direct control is selected, the data bits D7 to D0 correspond to the segment lines of the MAX6955. Character Generator Font Mapping The font is composed of 104 characters in ROM. The lower 7 bits of the 8-bit digit register represent the character selection. The most significant bit, shown as x in the ROM map of Tables 8 and 9, is 1 to light the DP segment and zero to leave the DP segment unlit. The character map follows the standard ASCII font for 96 characters in the x0101000 through x1111111 range. The first 16 characters of the 16-segment ROM map cover 7-segment displays. These 16 characters are numeric 0 to 9 and characters A to F (i.e., the hexadecimal set). 11 Display Blink Mode The display blinking facility, when enabled, makes the driver flip automatically between displaying the digit register data in planes P0 and P1. If the digit register ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Multiplex Clock and Blink Timing The OSC pin can be fitted with capacitor CSET to GND to use the internal RC multiplex oscillator, or driven by an external clock to set the multiplex clock frequency and blink rate. The multiplex clock frequency determines the frequency that the complete display is updated. With OSC at 4MHz, each display digit is enabled for 200s. The internal RC oscillator uses an external resistor, RSET, and an external capacitor, CSET, to set the oscillator frequency. The suggested values of RSET (56k) and C SET (22pF) set the oscillator at 4MHz, which makes the blink frequency 0.5Hz or 1Hz. The external clock is not required to have a 50:50 duty cycle, but the minimum time between transitions must be 50ns or greater and the maximum time between transitions must be 750ns. The on-chip oscillator may be accurate enough for applications using a single device. If an exact blink rate is required, use an external clock ranging between 1MHz and 8MHz to drive OSC. The OSC inputs of multiple MAX6955s can be connected to a common external clock to make the devices blink at the same rate. The relative blink phasing of multiple MAX6955s can be synchronized by setting the T bit in the control register for all the devices in quick succession. If the serial interfaces of multiple MAX6955s are daisy-chained by connecting the DOUT of one device to the DIN of the next, then synchronization is achieved automatically by updating the configuration register for all devices simultaneously. Figure 10 is the multiplex timing diagram. OSC_OUT Output The OSC_OUT output is a buffered copy of either the internal oscillator clock or the clock driven into the OSC pin if the external clock has been selected. The feature is useful if the internal oscillator is used, and the user wishes to synchronize other MAX6955s to the same blink frequency. Intensity Registers Digital control of display brightness is provided and can be managed in one of two ways: globally or individually. Global control adjusts all digits together. Individual control adjusts the digits separately. The default method is global brightness control, which is selected by clearing the global intensity bit (I data bit D6) in the configuration register. This brightness setting applies to all display digits. The pulse-width modulator is then set by the lower nibble of the global intensity register, address 0x02. The modulator scales the average segment current in 16 steps from a maximum of 15/16 down to 1/16 of the peak current. The minimum interdigit blanking time is set to 1/16 of a cycle. When using bicolor digits, 256 color/brightness combinations are available. Individual brightness control is selected by setting the global intensity bit (I data bit D6) in the configuration register. The pulse-width modulator is now no longer set by the lower nibble of the global intensity register, address 0x02, and the data is ignored. Individual digital control of display brightness is now provided by a separate pulse-width modulator setting for each digit. Each digit is controlled by a nibble of one of the four intensity registers: intensity10, intensity32, intensity54, and intensity76 for all display types, plus intensity10a, intensity32a, intensity54a, and intensity76a for the extra eight digits possible when 7-segment displays are used. The data from the relevant register is used for each digit as it is multiplexed. The modulator scales the average segment current in 16 steps in exactly the same way as global intensity adjustment. Table 27 shows the global intensity register format. Table 28 shows individual segment intensity registers. Table 29 shows the even individual segment intensity format. Table 30 shows the odd individual segment intensity format. GPIO and Key Scanning The MAX6955 features five general-purpose input/output (GPIO) ports: P0 to P4. These ports can be individually enabled as logic inputs or open-drain logic outputs. The GPIO ports are not debounced when configured as inputs. The ports can be read and the outputs set using the 2-wire interface. Some or all of the five ports can be configured to perform key scanning of up to 32 keys. Ports P0 to P4 are renamed Key_A, Key_B, Key_C, Key_D, and IRQ, respectively, when used for key scanning. The full keyscanning configuration is shown in Figure 11. Table 31 is the GPIO data register. Scan-Limit Register The scan-limit register sets how many 14-segment digits or 16-segment digits or pairs of 7-segment digits are displayed, from 1 to 8. A bicolor digit is connected as two monocolor digits. The scan register also limits the number of keys that can be scanned. Since the number of scanned digits affects the display brightness, the scan-limit register should not be used to blank portions of the display (such as leading-zero suppression). Table 26 shows the scan-limit register format. 12 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 7. Register Address Map REGISTER No-Op Decode Mode Global Intensity Scan Limit Configuration GPIO Data Port Configuration Display Test Write KEY_A Mask Read KEY_A Debounce Write KEY_B Mask Read KEY_B Debounce Write KEY_C Mask Read KEY_C Debounce Write KEY_D Mask Read KEY_D Debounce Write Digit Type Read KEY_A Pressed Read KEY_B Pressed* Read KEY_C Pressed* Read KEY_D Pressed* Intensity 10 Intensity 32 Intensity 54 Intensity 76 Intensity 10a (7 Segment Only) Intensity 32a (7 Segment Only) Intensity 54a (7 Segment Only) Intensity 76a (7 Segment Only) Digit 0 Plane P0 Digit 1 Plane P0 Digit 2 Plane P0 Digit 3 Plane P0 Digit 4 Plane P0 Digit 5 Plane P0 Digit 6 Plane P0 Digit 7 Plane P0 Digit 0a Plane P0 (7 Segment Only) Digit 1a Plane P0 (7 Segment Only) Digit 2a Plane P0 (7 Segment Only) Digit 3a Plane P0 (7 Segment Only) ADDRESS (COMMAND BYTE) D15 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X D14 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D13 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 D12 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 D11 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 D10 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D9 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 HEX CODE 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x20 0x21 0x22 0x23 0x24 0x25 0x26 0x27 0x28 0x29 0x2A 0x2B *Do NOT write to register. ______________________________________________________________________________________ 13 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 7. Register Address Map (continued) REGISTER Digit 4a Plane P0 (7 Segment Only) Digit 5a Plane P0 (7 Segment Only) Digit 6a Plane P0 (7 Segment Only) Digit 7a Plane P0 (7 Segment Only) Digit 0 Plane P1 Digit 1 Plane P1 Digit 2 Plane P1 Digit 3 Plane P1 Digit 4 Plane P1 Digit 5 Plane P1 Digit 6 Plane P1 Digit 7 Plane P1 Digit 0a Plane P1 (7 Segment Only) Digit 1a Plane P1 (7 Segment Only) Digit 2a Plane P1 (7 Segment Only) Digit 3a Plane P1 (7 Segment Only) Digit 4a Plane P1 (7 Segment Only) Digit 5a Plane P1 (7 Segment Only) Digit 6a Plane P1 (7 Segment Only) Digit 7a Plane P1 (7 Segment Only) Write Digit 0 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 1 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 2 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 3 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 4 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 5 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 6 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 7 Planes P0 and P1 with Same Data, Reads as 0x00 Write Digit 0a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 Write Digit 1a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 D15 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X D14 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ADDRESS (COMMAND BYTE) D13 D12 D11 D10 1 0 1 1 1 0 1 1 1 0 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 1 1 1 1 0 0 D9 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D8 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 HEX CODE 0x2C 0x2D 0x2E 0x2F 0x40 0x41 0x42 0x43 0x44 0x45 0x46 0x47 0x48 0x49 0x4A 0x4B 0x4C 0x4D 0x4E 0x4F 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 14 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 7. Register Address Map (continued) REGISTER Write Digit 2a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 Write Digit 3a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 Write Digit 4a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 Write Digit 5a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 Write Digit 6a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 Write Digit 7a Planes P0 and P1 with Same Data (7 Segment Only), Reads as 0x00 ADDRESS (COMMAND BYTE) D15 X X X X X X D14 1 1 1 1 1 1 D13 1 1 1 1 1 1 D12 0 0 0 0 0 0 D11 1 1 1 1 1 1 D10 0 0 1 1 1 1 D9 1 1 0 0 1 1 D8 0 1 0 1 0 1 HEX CODE 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F Note: Unused register bits read as zero. START CONDITION SCL SDA SDA BY TRANSMITTER CLOCK PULSE FOR ACKNOWLEDGMENT 1 2 8 9 SCL DATA LINE STABLE, CHANGE OF DATA DATA VALID ALLOWED SDA BY RECEIVER S Figure 5. Bit Transfer Figure 6. Acknowledge One diode is required per key switch. These diodes can be common-anode dual diodes in SOT23 packages, such as the BAW56. Sixteen diodes would be required for the maximum 32-key configuration. The MAX6955 can only scan the maximum 32 keys if the scan-limit register is set to scan the maximum eight digits. If the MAX6955 is driving fewer digits, then a maximum of (4 x n) switches can be scanned, where n is the number of digits set in the scan-limit register. For example, if the MAX6955 is driving four 14-segment digits, cathode drivers O0 to O3 are used. Only 16 keys can be scanned in this configuration; the switches shown connected to O4 through O7 are not read. If the user wishes to scan fewer than 32 keys, then fewer scan lines can be configured for key scanning. The unused Key_x ports are released back to their original GPIO functionality. If key scanning is enabled, regardless of the number of keys being scanned, P4 is always configured as IRQ (Table 32). The key-scanning circuit utilizes the LEDs' commoncathode driver outputs as the key-scan drivers. O0 to O7 go low for nominally 200s (with OSC = 4MHz) in turn as the displays are multiplexed. By varying the oscillator frequency, the debounce time changes, though key scanning still functions. Key_x inputs have internal pullup resistors that allow the key condition to be tested. The Key_x input is low during the appropriate digit multiplex period when the key is pressed. The timing diagram of Figure 12 shows the normal situation where all eight LED cathode drivers are used. ______________________________________________________________________________________ 15 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION ACKNOWLEDGE FROM MAX6955 D15 D14 D13 D12 D11 D10 D9 D8 S SLAVE ADDRESS R/W 0 A COMMAND BYTE ACKNOWLEDGE FROM MAX6955 A P Figure 7. Command Byte Received ACKNOWLEDGE FROM MAX6955 HOW CONTROL BYTE AND DATA BYTE MAP INTO MAX6955's REGISTERS ACKNOWLEDGE FROM MAX6955 S SLAVE ADDRESS R/W 0 A COMMAND BYTE A D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 ACKNOWLEDGE FROM MAX6955 D4 D3 D2 D1 D0 DATA BYTE 1 BYTE AUTOINCREMENT MEMORY WORD ADDRESS A P Figure 8. Command and Single Data Byte Received ACKNOWLEDGE FROM MAX6955 HOW CONTROL BYTE AND DATA BYTE MAP INTO MAX6955's REGISTERS ACKNOWLEDGE FROM MAX6955 S SLAVE ADDRESS R/W 0 A COMMAND BYTE A D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 ACKNOWLEDGE FROM MAX6955 D4 D3 D2 D1 D0 DATA BYTE n BYTE AUTOINCREMENT MEMORY WORD ADDRESS A P Figure 9. n Data Bytes Received The timing in Figure 12 loops over time, with 32 keys experiencing a full key-scanning debounce over typically 25.6ms. Four keys are sampled every 1.6ms, or every multiplex cycle. If at least one key that was not previously pressed is found to have been pressed during both sampling periods, then that key press is debounced, and an interrupt is issued. The key-scan circuit detects any combination of keys being pressed during each debounce cycle (n-key rollover). Port Configuration Register The port configuration register selects how the five port pins are used. The port configuration register format is described in Table 33. Key Mask Registers The Key_A Mask, Key_B Mask, Key_C Mask, and Key_D Mask write-only registers (Table 34) configure the key-scanning circuit to cause an interrupt only when selected (masked) keys have been debounced. Each bit in the register corresponds to one key switch. The bit is clear to disable interrupt for the switch, and set to enable interrupt. Keys are always scanned (if enabled through the port configuration register), regardless of the setting of these interrupt bits, and the key status is stored in the appropriate Key_x pressed register. 16 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 ONE COMPLETE 1.6ms MULTIPLEX CYCLE AROUND 8 DIGITS 200s DIGIT 0 DIGIT 1 DIGIT 2 DIGIT 3 DIGIT 4 DIGIT 5 DIGIT 6 DIGIT 7 START OF NEXT CYCLE DIGIT 0 CATHODE DRIVER INTENSITY SETTINGS DIGIT 0's 200s MULTIPLEX TIMESLOT 1/16TH (MIN ON) 2/16TH LOW 3/16TH LOW 4/16TH LOW 5/16TH LOW 6/16TH LOW 7/16TH LOW 8/16TH LOW 9/16TH LOW 10/16TH LOW 11/16TH LOW 12/16TH LOW 13/16TH LOW 14/16TH LOW 15/16TH LOW 15/16TH (MAX ON) HIGH-Z LOW CURRENT SOURCE ENABLED HIGH-Z MINIMUM 12.5s INTERDIGIT BLANKING INTERVAL HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z HIGH-Z ANODE (LIT) ANODE (UNLIT) HIGH-Z Figure 10. Multiplex Timing Diagram (OSC = 4MHz) ______________________________________________________________________________________ 17 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 LED OUTPUT O0 SW A0 LED OUTPUT O1 SW A1 LED OUTPUT O2 SW A2 LED OUTPUT O3 SW A3 LED OUTPUT O4 SW A4 LED OUTPUT O5 SW A5 LED OUTPUT O6 SW A6 LED OUTPUT O7 VCC KEY_A KEY_B KEY_C KEY_D IRQ MICROCONTROLLER INTERRUPT SW A7 SW B7 SW C7 SW D7 SW B6 SW C6 SW D6 SW B5 SW C5 SW D5 SW B4 SW C4 SW D4 SW B3 SW C3 SW D3 SW B2 SW C2 SW D2 SW B1 SW C1 SW D1 SW B0 SW C0 SW D0 Figure 11. Key-Scanning Configuration THE FIRST HALF OF A 25.6ms KEY-SCAN CYCLE 1.6ms MULTIPLEX CYCLE 1 1.6ms MULTIPLEX CYCLE 2 1.6ms MULTIPLEX CYCLE 8 THE SECOND HALF OF A 25.6ms KEY-SCAN CYCLE 1.6ms MULTIPLEX CYCLE 1 1.6ms MULTIPLEX CYCLE 8 12.5s TO 187.5s DIGIT PERIOD LED OUTPUT O0 LED OUTPUT O1 LED OUTPUT O2 LED OUTPUT O3 LED OUTPUT O4 LED OUTPUT O5 LED OUTPUT O6 LED OUTPUT O7 A B C D E A FIRST TEST OF KEY SWITCHES SECOND TEST OF KEY SWITCHES INTERRUPT ASSERTED IF REQUIRED DEBOUNCE REGISTER UPDATED START OF NEXT KEY-SCAN CYCLE Figure 12. Key-Scan Timing Diagram 18 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan Key Debounced Registers The Key_A debounced, Key_B debounced, Key_C debounced, and Key_D debounced read-only registers (Table 35) show which keys have been detected as debounced by the key-scanning circuit. Each bit in the register corresponds to one key switch. The bit is set if the switch has been correctly debounced since the register was read last. Reading a debounced register clears that register (after the data has been read) so that future keys pressed can be identified. If the debounced registers are not read, the key-scan data accumulates. However, as there is no FIFO in the MAX6955, the user is not able to determine key order, or whether a key has been pressed more than once, unless the debounced key status registers are read after each interrupt, and before the next keyscan cycle. Reading any of the four debounced registers clears the IRQ output. If a key is pressed and held down, the key is reported as debounced (and IRQ issued) only once. The key must be detected as released by the key-scanning circuit, before it debounces again. If the debounced registers are being read in response to the IRQ being asserted, then the user should generally read all four registers to ensure that all the keys that were detected by the key-scanning circuit are discovered. Key Pressed Registers The Key_A pressed, Key_B pressed, Key_C pressed, and Key_D pressed read-only registers (Table 36) show which keys have been detected as pressed by the key-scanning circuit during the last test. Each bit in the register corresponds to one key switch. The bit is set if the switch has been detected as pressed by the key-scanning circuit during the last test. The bit is cleared if the switch has not been detected as pressed by the key-scanning circuit during the last test. Reading a pressed register does not clear that register or clear the IRQ output. MAX6955 Selecting External Components RSET and CSET to Set Oscillator Frequency and Peak Segment Current The RC oscillator uses an external resistor, RSET, and an external capacitor, CSET, to set the frequency, fOSC. The allowed range of fOSC is 1MHz to 8MHz. RSET also sets the peak segment current. The recommended values of RSET and CSET set the oscillator to 4MHz, which makes the blink frequencies selectable between 0.5Hz and 1Hz. The recommended value of RSET also sets the peak current to 40mA, which makes the segment current adjustable from 2.5mA to 37.5mA in 2.5mA steps. ISEG = KL / RSET mA fOSC = KF / (RSET x CSET) MHz where: KL = 2240 KF = 5376 RSET = external resistor in k CSET = external capacitor in pF CSTRAY = stray capacitance from OSC pin to GND in pF, typically 2pF The recommended value of RSET is 56k and the recommended value of CSET is 22pF. The recommended value of R SET is the minimum allowed value, since it sets the display driver to the maximum allowed peak segment current. RSET can be set to a higher value to set the segment current to a lower peak value where desired. The user must also ensure that the peak current specifications of the LEDs connected to the driver are not exceeded. The effective value of CSET includes not only the actual external capacitor used, but also the stray capacitance from OSC to GND. This capacitance is usually in the 1pF to 5pF range, depending on the layout used. Applications Information Driving Bicolor LEDs Bicolor digits group a red and a green die together for each display element, so that the element can be lit red or green (or orange), depending on which die (or both) is lit. The MAX6955 allows each segment's current to be set individually from the 1/16th (minimum current and LED intensity) to 15/16th (maximum current and LED intensity), as well as off (zero current). Thus, a bicolor (red-green) segment pair can be set to 256 color/intensity combinations. Display Test Register The display test register (Table 37) operates in two modes: normal and display test. Display test mode turns all LEDs on (including DPs) by overriding, but not altering, all controls and digit registers (including the shutdown register), except for the digit-type register and the GPIO configuration register. The duty cycle, while in display test mode, is 7/16 (see the Choosing Supply Voltage to Minimize Power Dissipation section). ______________________________________________________________________________________ 19 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Choosing Supply Voltage to Minimize Power Dissipation The MAX6955 drives a peak current of 40mA into LEDs with a 2.2V forward-voltage drop when operated from a supply voltage of at least 3.0V. The minimum voltage drop across the internal LED drivers is therefore (3.0V 2.2V) = 0.8V. If a higher supply voltage is used, the driver absorbs a higher voltage, and the driver's power dissipation increases accordingly. However, if the LEDs used have a higher forward-voltage drop than 2.2V, the supply voltage must be raised accordingly to ensure that the driver always has at least 0.6V of headroom. The voltage drop across the drivers with a nominal 5V supply (5.0V - 2.2V) = 2.8V is nearly 3 times the drop across the drivers with a nominal 3.3V supply (3.3V 2.2V) = 1.1V. In most systems, consumption is an important design criterion, and the MAX6955 should be operated from the system's 3.3V nominal supply. In other designs, the lowest supply voltage may be 5V. The issue now is to ensure the dissipation limit for the MAX6955 is not exceeded. This can be achieved by inserting a series resistor in the supply to the MAX6955, ensuring that the supply decoupling capacitors are still on the MAX6955 side of the resistor. For example, consider the requirement that the minimum supply voltage to a MAX6955 must be 3.0V, and the input supply range is 5V 5%. Maximum supply current is 35mA + (40mA x 17) = 715mA. Minimum input supply voltage is 4.75V. Maximum series resistor value is (4.75V 3.0V)/0.715A = 2.44. We choose 2.2 5%. Worstcase resistor dissipation is at maximum toleranced resistance, i.e., (0.715A) 2 x (2.2 x 1.05) = 1.18W. The maximum MAX6955 supply voltage is at maximum input supply voltage and minimum toleranced resistance, i.e., 5.25V - (0.715A x 2.2 x 0.95) = 3.76V. age, the driver output stages can brown out, and be unable to regulate the current correctly. As the supply voltage drops further, the LED segment drive current becomes effectively limited by the output driver's onresistance, and the LED drive current drops. The characteristics of each individual LED in a display digit are well matched, so the result is that the display intensity dims uniformly as supply voltage drops out of regulation and beyond. Computing Power Dissipation The upper limit for power dissipation (P D ) for the MAX6955 is determined from the following equation: PD = (V+ x 35mA) + (V+ - VLED) (DUTY x ISEG x N) where: V+ = supply voltage DUTY = duty cycle set by intensity register N = number of segments driven (worst case is 17) VLED = LED forward voltage at ISEG ISEG = segment current set by RSET PD = Power dissipation, in mW if currents are in mA Dissipation example: ISEG = 30mA, N = 17, DUTY = 15/16, VLED = 2.4V at 30mA, V+ = 3.6V PD = 3.6V (35mA) + (3.6V - 2.4V)(15/16 x 30mA x 17) = 0.700W Thus, for a 36-pin SSOP package (TJA = 1 / 0.0118 = +85C/W from Operating Ratings), the maximum allowed ambient temperature TA is given by: TJ(MAX) = TA + (PD x TJA) = +150C = TA + (0.700 x +85C/W) So TA = +90.5C. Thus, the part can be operated safely at a maximum package temperature of +85C. Low-Voltage Operation The MAX6955 works over the 2.7V to 5.5V supply range. The minimum useful supply voltage is determined by the forward-voltage drop of the LEDs at the peak current ISEG, plus the 0.8V headroom required by the driver output stages. The MAX6955 correctly regulates ISEG with a supply voltage above this minimum voltage. If the supply drops below this minimum volt- Power Supplies The MAX6955 operates from a single 2.7V to 5.5V power supply. Bypass the power supply to GND with a 0.1F capacitor as close to the device as possible. Add a 47F capacitor if the MAX6955 is not close to the board's input bulk decoupling capacitor. 20 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 8. 16-Segment Display Font Map MSB LSB x000 x001 x010 x011 x100 x101 x110 x111 Table 9. 14-Segment Display Font Map MSB LSB x000 x001 x010 x011 x100 x101 x110 x111 0000 0000 0001 0001 0010 0010 0011 0011 0100 0100 0101 0101 0110 0110 0111 0111 1000 1000 1001 1001 1010 1010 1011 1011 1100 1100 1101 1101 1110 1110 1111 1111 ______________________________________________________________________________________ 21 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 10. Digit Plane Data Register Format MODE ADDRESS CODE (HEX) 0x20 to 0x2F 0x40 to 0x4F 0x60 to 0x6F 0x20 to 0x2F 0x40 to 0x4F 0x60 to 0x6F 0x20 to 0x2F 0x40 to 0x4F 0x60 to 0x6F 0x20 to 0x2F 0x40 to 0x4F 0x60 to 0x6F 0x20 to 0x2F 0x40 to 0x4F 0x60 to 0x6F REGISTER DATA D7 D6 D5 D4 D3 D2 D1 D0 14-segment or 16-segment mode, writing digit data to use font map data with decimal place unlit 0 Bits D6 to D0 select font characters 0 to 127 14-segment or 16-segment mode, writing digit data to use font map data with decimal place lit 1 Bits D6 to D0 select font characters 0 to 127 7-segment decode mode, DP unlit 0 0 0 0 D3 to D0 7-segment decode mode, DP lit 1 0 0 0 D3 to D0 7-segment no-decode mode Direct control of 8 segments Table 11. Segment Decoding for 7-Segment Displays MODE ADDRESS CODE (HEX) 0x20 to 0x2F 0x40 to 0x4F 0x60 to 0x6F REGISTER DATA D7 D6 D5 D4 D3 D2 D1 D0 Segment Line dp a b c d e f g 22 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 12. 7-Segment Segment Mapping Decoder for Hexadecimal Font 7-SEGMENT CHARACTER D7* 0 1 2 3 4 5 6 7 8 9 A B C D E F -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- REGISTER DATA D6, D5, D4 X X X X X X X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 DP* -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- A 1 0 1 1 0 1 1 1 1 1 1 0 1 0 1 1 ON SEGMENTS = 1 B 1 1 1 1 1 0 0 1 1 1 1 0 0 1 0 0 C 1 1 0 1 1 1 1 1 1 1 1 1 0 1 0 0 D 1 0 1 1 0 1 1 0 1 1 0 1 1 1 1 0 E 1 0 1 0 0 0 1 0 1 0 1 1 1 1 1 1 F 1 0 0 0 1 1 1 0 1 1 1 1 1 0 1 1 G 0 0 1 1 1 1 1 0 1 1 1 1 0 1 1 1 *The decimal point is set by bit D7 = 1. Table 13. Digit-Type Register DIGIT-TYPE REGISTER Output Drive Line Slot Identification ADDRESS CODE (HEX) 0x0C REGISTER DATA D7 CC7 Slot 4 D6 CC6 D5 CC5 Slot 3 D4 CC4 D3 CC3 Slot 2 D2 CC2 D1 CC1 Slot 1 D0 CC0 ______________________________________________________________________________________ 23 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 14. Example Configurations for Display Digit Combinations DIGIT-TYPE REGISTER SETTING Digits 7 to 0 are 16-segment or 7segment digits. Digit 0 is a 14-segment digit, digits 7 to 1 are 16-segment or 7segment digits. Digits 2 to 0 are 14-segment digits, digits 7 to 3 are 16segment or 7-segment digits. Digits 7 to 0 are 14-segment digits. ADDRESS CODE (HEX) 0x0C REGISTER DATA D7 0 D6 0 D5 0 D4 0 D3 0 D2 0 D1 0 D0 0 0x0C 0 0 0 0 0 0 0 1 0x0C 0 0 0 0 0 1 1 1 0x0C 1 1 1 1 1 1 1 1 Table 15. Decode-Mode Register Examples DECODE MODE No decode for digit pairs 7 to 0. Hexadecimal decode for digit pair 0, no decode for digit pairs 7 to 1. Hexadecimal decode for digit pairs 2 to 0, no decode for digit pairs 7 to 3. Hexadecimal decode for digit pairs 7 to 0. ADDRESS CODE (HEX) 0x01 0x01 0x01 0x01 REGISTER DATA D7 0 0 0 1 D6 0 0 0 1 D5 0 0 0 1 D4 0 0 0 1 D3 0 0 0 1 D2 0 0 1 1 D1 0 0 1 1 D0 0 1 1 1 HEX CODE 0x00 0x01 0x07 0xFF 24 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 16. Initial Power-Up Register Status REGISTER Decode Mode Global Intensity Scan Limit Control Register GPIO Data Port Configuration Display Test Key_A Mask Key_B Mask Key_C Mask Key_D Mask Digit Type Intensity10 Intensity32 Intensity54 Intensity76 Intensity10a Intensity32a Intensity54a Intensity76a Digit 0 Digit 1 Digit 2 Digit 3 Digit 4 Digit 5 Digit 6 Digit 7 Digit 0a Digit 1a Digit 2a Digit 3a Digit 4a Digit 5a Digit 6a Digit 7a Key_A Debounced Key_B Debounced Key_C Debounced Key_D Debounced Key_A Pressed Key_B Pressed Key_C Pressed Key_D Pressed POWER-UP CONDITION Decode mode enabled 1/16 (min on) Display 8 digits: 0, 1, 2, 3, 4, 5, 6, 7 Shutdown enabled, blink speed is slow, blink disabled Outputs are low No key scanning, P0 to P4 are all inputs Normal operation None of the keys cause interrupt None of the keys cause interrupt None of the keys cause interrupt None of the keys cause interrupt All are 16 segment or 7 segment 1/16 (min on) 1/16 (min on) 1/16 (min on) 1/16 (min on) 1/16 (min on) 1/16 (min on) 1/16 (min on) 1/16 (min on) Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes Blank digit, both planes No key presses have been detected No key presses have been detected No key presses have been detected No key presses have been detected Keys are not pressed Keys are not pressed Keys are not pressed Keys are not pressed ADDRESS CODE (HEX) 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x60 0x61 0x62 0x63 0x64 0x65 0x66 0x67 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F REGISTER DATA D7 1 X X 0 X 0 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D6 1 X X 0 X 0 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D5 1 X X X X 0 X 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D4 1 X X X 0 1 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D3 1 0 X 0 0 1 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D2 1 0 1 0 0 1 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D1 1 0 1 0 0 1 X 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D0 1 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ______________________________________________________________________________________ 25 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 17. Configuration Register Format MODE Configuration Register REGISTER DATA D7 P D6 I D5 R D4 T D3 E D2 B D1 X D0 MODE S Shutdown Normal Operation D7 P P D6 I I Table 18. Shutdown Control (S Data Bit DO) Format REGISTER DATA D5 R R D4 T T D3 E E D2 B B D1 X X D0 0 1 Table 19. Blink Rate Selection (B Data Bit D2) Format MODE Slow blinking. Segments blink on for 1s, off for 1s with fOSC = 4MHz. Fast blinking. Segments blink on for 0.5s, off for 0.5s with fOSC = 4MHz. REGISTER DATA D7 P P D6 I I D5 R R D4 T T D3 E E D2 0 1 D1 X X D0 S S Table 20. Global Blink Enable/Disable (E Data Bit D3) Format MODE Blink function is disabled. Blink function is enabled. D7 P P D6 I I D5 R R REGISTER DATA D4 D3 T 0 T 1 D2 B B D1 X X D0 S S Table 21. Digit Register Mapping with Blink Globally Enabled SEGMENT'S BIT SETTING IN PLANE P1 0 0 1 1 SEGMENT'S BIT SETTING IN PLANE P0 0 1 0 1 Segment off. Segment on only during the 1st half of each blink period. Segment on only during the 2nd half of each blink period. Segment on. SEGMENT BEHAVIOR Table 22. Global Blink Timing Synchronization (T Data Bit D4) Format MODE Blink timing counters are unaffected. Blink timing counters are reset during the I2C acknowledge. REGISTER DATA D7 P P D6 I I D5 R R D4 0 1 D3 E E D2 B B D1 X X D0 S S Table 23. Global Clear Digit Data (R Data Bit D5) Format MODE Digit data for both planes P0 and P1 are unaffected. Digit data for both planes P0 and P1 are cleared during the I2C acknowledge. REGISTER DATA D7 P P D6 I I D5 0 1 D4 T T D3 E E D2 B B D1 X X D0 S S 26 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 24. Global Intensity (I Data Bit D6) Format MODE Intensity for all digits is controlled by one setting in the global intensity register. Intensity for digits is controlled by the individual settings in the intensity10 and intensity76 registers. REGISTER DATA D7 P P D6 0 1 D5 R R D4 T T D3 E E D2 B B D1 X X D0 S S Table 25. Blink Phase Readback (P Data Bit D7) Format MODE P1 Blink Phase P0 Blink Phase D7 0 1 D6 I I D5 R R REGISTER DATA D4 D3 T E T E D2 B B D1 X X D0 S S Table 26. Scan-Limit Register Format SCAN LIMIT Display Digit 0 only Display Digits 0 and 1 Display Digits 0 1 2 Display Digits 0 1 2 3 Display Digits 0 1 2 3 4 Display Digits 0 1 2 3 4 5 Display Digits 0 1 2 3 4 5 6 Display Digits 0 1 2 3 4 5 6 7 ADDRESS CODE (HEX) 0x03 0x03 0x03 0x03 0x03 0x03 0x03 0x03 REGISTER DATA D7 X X X X X X X X D6 X X X X X X X X D5 X X X X X X X X D4 X X X X X X X X D3 X X X X X X X X D2 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 HEX CODE 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 Table 27. Global Intensity Register Format DUTY CYCLE 1/16 (min on) 2/16 3/16 4/16 5/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 15/16 (max on) TYPICAL SEGMENT CURRENT (mA) 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 35 37.5 37.5 ADDRESS CODE (HEX) 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02 REGISTER DATA D7 X X X X X X X X X X X X X X X X D6 X X X X X X X X X X X X X X X X D5 X X X X X X X X X X X X X X X X D4 X X X X X X X X X X X X X X X X D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 HEX CODE 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 0xX8 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF ______________________________________________________________________________________ 27 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 28. Individual Segment Intensity Registers REGISTER FUNCTION Intensity10 Register Intensity32 Register Intensity54 Register Intensity76 Register Intensity10a Register Intensity32a Register Intensity54a Register Intensity76a Register ADDRESS CODE (HEX) 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 REGISTER DATA D7 D6 Digit 1 Digit 3 Digit 5 Digit 7 Digit 1a (7 segment only) Digit 3a (7 segment only) Digit 5a (7 segment only) Digit 7a (7 segment only) D5 D4 D3 D2 Digit 0 Digit 2 Digit 4 Digit 6 Digit 0a (7 segment only) Digit 2a (7 segment only) Digit 4a (7 segment only) Digit 6a (7 segment only) D1 D0 Table 29. Even Individual Segment Intensity Format DUTY CYCLE 1/16 (min on) 2/16 3/16 4/16 5/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 15/16 (max on) TYPICAL SEGMENT CURRENT (mA) 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 35 37.5 37.5 ADDRESS CODE (HEX) 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 See Table 30. REGISTER DATA D7 D6 D5 D4 D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 HEX CODE 0xX0 0xX1 0xX2 0xX3 0xX4 0xX5 0xX6 0xX7 0xX8 0xX9 0xXA 0xXB 0xXC 0xXD 0xXE 0xXF 28 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 30. Odd Individual Segment Intensity Format DUTY CYCLE 1/16 (min on) 2/16 3/16 4/16 5/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 15/16 (max on) TYPICAL SEGMENT CURRENT (mA) 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 35 37.5 37.5 ADDRESS CODE (HEX) 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 0x10 to 0x17 REGISTER DATA D7 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D6 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D5 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 D4 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 See Table 29. D3 D2 D1 D0 HEX CODE 0x0X 0x1X 0x2X 0x3X 0x4X 0x5X 0x6X 0x7X 0x8X 0x9X 0xAX 0xBX 0xCX 0xDX 0xEX 0xFX Table 31. GPIO Data Register MODE Write GPIO Data Read GPIO Data ADDRESS CODE (HEX) 0x05 0x05 D7 X 0 D6 X 0 D5 X 0 REGISTER DATA D4 D3 P4 P4 or IRQ status P3 P3 D2 P2 P2 D1 P1 P1 D0 P0 P0 Table 32. Port Scanning Function Allocation KEYS SCANNED None 1 to 8 9 to 16 17 to 24 25 to 36 PORTS AVAILABLE 5 pins 3 pins 2 pins 1 pin None P0 GPIO Key_A Key_A Key_A Key_A P1 GPIO GPIO Key_B Key_B Key_B P2 GPIO GPIO GPIO Key_C Key_C P3 GPIO GPIO GPIO GPIO Key_D P4 GPIO IRQ IRQ IRQ IRQ ______________________________________________________________________________________ 29 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 33. Port Configuration Register Format MODE ADDRESS CODE (HEX) D7 D6 D5 REGISTER DATA D4 D3 D2 D1 D0 GPIO 0x06 Set number of keys scanned Configuration Register PORT ALLOCATION OPTIONS 0 Keys Scanned 0x06 0 0 0 8 Keys Scanned 0x06 0 0 1 16 Keys Scanned 0x06 0 1 0 24 Keys Scanned 0x06 0 1 1 32 Keys Scanned 0x06 1 X X EXAMPLE PORT CONFIGURATION SETTINGS No Keys Scanned, P4 and 0x06 0 0 0 P2 Are Outputs, Others Are Inputs 8 Keys Scanned, P3 and P1 Are 0x06 0 1 0 Outputs, P2 Is an Input 32 Keys 0x06 1 X X Scanned, No GPIO Ports Set port direction for ports P0 to P4: 0 = output, 1 = input P4 IRQ IRQ IRQ IRQ P3 P3 P3 P3 Key_D P2 P2 P2 Key_C Key_C P1 P1 Key_B Key_B Key_B P0 Key_A Key_A Key_A Key_A 0 1 0 1 1 X 0 1 0 X X X X X X Table 34. Key Mask Register Format (Write Only) KEY MASK REGISTER Key_A Mask Register Key_B Mask Register Key_C Mask Register Key_D Mask Register ADDRESS CODE (HEX 0x08 0x09 0x0A 0x0B REGISTER DATA WITH APPROPRIATE SWITCH NAMED BELOW D7 SW_A7 SW_B7 SW_C7 SW_ D7 D6 SW_A6 SW_B6 SW_C6 SW_D6 D5 SW_A5 SW_B5 SW_C5 SW_D5 D4 SW_A4 SW_B4 SW_C4 SW_D4 D3 SW_A3 SW_B3 SW_C3 SW_D3 D2 SW_A2 SW_B2 SW_C2 SW_D2 D1 SW_A1 SW_B1 SW_C1 SW_D1 D0 SW_A0 SW_B0 SW_C0 SW_D0 30 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 35. Key Debounced Register Format (Read Only) KEY DEBOUNCED REGISTER Key_A Debounced Register Key_B Debounced Register Key_C Debounced Register Key_D Debounced Register ADDRESS CODE (HEX) 0x08 REGISTER DATA D7 SW_A7 D6 SW_A6 D5 SW_A5 D4 SW_A4 D3 SW_A3 D2 SW_A2 D1 SW_A1 D0 SW_A0 0x09 SW_B7 SW_B6 SW_B5 SW_B4 SW_B3 SW_B2 SW_B1 SW_B0 0x0A SW_C7 SW_C6 SW_C5 SW_C4 SW_C3 SW_C2 SW_C1 SW_C0 0x0B SW_D7 SW_D6 SW_D5 SW_D4 SW_D3 SW_D2 SW_D1 SW_D0 Table 36. Key Pressed Register Format (Read Only) KEY PRESSED REGISTER Key_A Pressed Register Key_B Pressed Register Key_C Pressed Register Key_D Pressed Register ADDRESS CODE (HEX 0x0C REGISTER DATA D7 SW_A7 D6 SW_A6 D5 SW_A5 D4 SW_A4 D3 SW_A3 D2 SW_A2 D1 SW_A1 D0 SW_A0 0x0D SW_B7 SW_B6 SW_B5 SW_B4 SW_B3 SW_B2 SW_B1 SW_B0 0x0E SW_C7 SW_C6 SW_C5 SW_C4 SW_C3 SW_C2 SW_C1 SW_C0 0x0F SW_D7 SW_D6 SW_D5 SW_D4 SW_D3 SW_D2 SW_D1 SW_D0 Table 37. Display Test Register MODE Normal Operation Display Test ADDRESS CODE (HEX) 0x07 0x07 REGISTER DATA D7 X X D6 X X D5 X X D4 X X D3 X X D2 X X D1 X X D0 0 1 ______________________________________________________________________________________ 31 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 38. Slot 1 Configuration CC0: (2) 7-seg monocolor* or 7-seg bicolor CC1: (2) 7-seg monocolor* or 7-seg bicolor CC0 and CC1: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* CC0 and CC1: (2) 14-seg monocolor or 14-seg bicolor CC0 CC1 a -- b c d -- e f g1 g2 h i k l l m dp 1 1 CC0: 16-seg monocolor CC1: 16-seg monocolor CC0: 16-seg monocolor CC1: 14-seg monocolor CC0: 14-seg monocolor CC1: 16-seg monocolor -- CC1 a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp 00 01 02 03 04 05 06 07 08 09 010 011 012 013 014 015 016 017 018 ADDRESS CODE (HEX) D7 REGISTER DATA D6 D5 D4 D3 D2 D1 D0 CC0 -- a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp -- CC1 a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp CC0 CC1 1a -- 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp CC0 CC1 a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp CC0 and CC1: (1)16-seg bicolor CONFIGURATION CHOICE Common-Cathode Drive: Digit Type CC0 -- a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp CC0 -- 1a -- 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 0x0C -- CC1 a -- b c d -- e f g1 g2 h i j k l m dp CC0 -- a -- b c d -- e f g1 g2 h i j k l m dp -- CC1 1a -- 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp See Table 41. See Table 40. See Table 39. 0 0 1 0 0 1 *7-segment digits can be replaced by directly controlled discrete LEDs according to settings in decode mode register (Table 11). **The highlighted row is used in Typical Operating Circuit 1 for display digits 0 and 1. 32 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 39. Slot 2 Configuration CC2: (2) 7-seg monocolor* or 7-seg bicolor CC3: (2) 7-seg monocolor* or 7-seg bicolor CC2 and CC3: (2) 14-seg monocolor or 14-seg bicolor a -- CC2 CC3 b c d -- e f g1 g2 h i k l l m dp 1 1 CC2 and CC3: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* CC2: 16-seg monocolor CC3: 16-seg monocolor CC2: 16-seg monocolor CC3: 14-seg monocolor CC2: 14-seg monocolor CC3: 16-seg monocolor a1 a2 -- CC3 b c d1 d2 e f g1 g2 h i j k l m dp 00 01 02 03 04 05 06 07 08 09 010 011 012 013 014 015 016 017 018 ADDRESS CODE (HEX) D7 REGISTER DATA D6 D5 D4 D3 D2 D1 D0 a1 a2 CC2 -- b c d1 d2 e f g1 g2 h i j k l m dp a1 a2 -- CC3 b c d1 d2 e f g1 g2 h i j k l m dp 1a -- CC2 CC3 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp CC2 and CC3: (1)16-seg bicolor a1 a2 CC2 CC3 b c d1 d2 e f g1 g2 h i j k l m dp CONFIGURATION CHOICE Common-Cathode Drive: Digit Type a1 a2 CC2 -- b c d1 d2 e f g1 g2 h i j k l m dp 1a -- CC2 -- 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 0x0C a -- -- CC3 b c d -- e f g1 g2 h i j k l m dp a -- CC2 -- b c d -- e f g1 g2 h i j k l m dp 1a -- -- CC3 1b 1c 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp See Table 41. See Table 40. 0 0 1 0 See Table 38. 0 1 *7-segment digits can be replaced by directly controlled discrete LEDs according to settings in decode mode register (Table 11). **The highlighted row is used in Typical Operating Circuit 1 for display digits 2 and 3. ______________________________________________________________________________________ 33 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 40. Slot 3 Configuration CC4: (2) 7-seg monocolor* or 7-seg bicolor CC5: (2) 7-seg monocolor* or 7-seg bicolor CC4 and CC5: (2) 14-seg monocolor or 14-seg bicolor a -- b c CC4 CC5 d -- e f g1 g2 h i k l l m dp 1 1 CC4 and CC5: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* CC4: 16-seg monocolor CC5: 16-seg monocolor CC4: 16-seg monocolor CC5: 14-seg monocolor CC4: 14-seg monocolor CC5: 16-seg monocolor a1 a2 b c -- CC5 d1 d2 e f g1 g2 h i j k l m dp 00 01 02 03 04 05 06 07 08 09 010 011 012 013 014 015 016 017 018 ADDRESS CODE (HEX) D7 REGISTER DATA D6 D5 D4 D3 D2 D1 D0 a1 a2 b c CC4 -- d1 d2 e f g1 g2 h i j k l m dp a1 a2 b c -- CC5 d1 d2 e f g1 g2 h i j k l m dp 1a -- 1b 1c CC4 CC5 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp CC4 and CC5: (1)16-seg bicolor a1 a2 b c CC4 CC5 d1 d2 e f g1 g2 h i j k l m dp CONFIGURATION CHOICE Common-Cathode Drive: Digit Type a1 a2 b c CC4 -- d1 d2 e f g1 g2 h i j k l m dp 1a -- 1b 1c CC4 -- 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 0x0C a -- b c -- CC5 d -- e f g1 g2 h i j k l m dp a -- b c CC4 -- d -- e f g1 g2 h i j k l m dp 1a -- 1b 1c -- CC5 1d 1dp 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp See Table 41. 0 0 1 0 See Table 39. See Table 38. 0 1 *7-segment digits can be replaced by directly controlled discrete LEDs according to settings in decode mode register (Table 11). **The highlighted row is used in Typical Operating Circuit 1 for display digits 4 and 5. 34 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Table 41. Slot 4 Configuration CC6: (2) 7-seg monocolor* or 7-seg bicolor CC7: (2) 7-seg monocolor* or 7-seg bicolor CC6 and CC7: (2) 14-seg monocolor or 14-seg bicolor a -- b c d -- CC6 CC7 e f g1 g2 h i k l l m dp 1 1 CC6 and CC7: (2) 7-seg bicolor or (4) 7-seg monocolor or (1) 7-seg bicolor and (2) 7-seg monocolor* CC6: 16-seg monocolor CC7: 16-seg monocolor CC6: 16-seg monocolor CC7: 14-seg monocolor CC6: 14-seg monocolor CC7: 16-seg monocolor a1 a2 b c d1 d2 -- CC7 e f g1 g2 h i j k l m dp 00 01 02 03 04 05 06 07 08 09 010 011 012 013 014 015 016 017 018 ADDRESS CODE (HEX) D7 REGISTER DATA D6 D5 D4 D3 D2 D1 D0 a1 a2 b c d1 d2 CC6 -- e f g1 g2 h i j k l m dp a1 a2 b c d1 d2 -- CC7 e f g1 g2 h i j k l m dp 1a -- 1b 1c 1d 1dp CC6 CC7 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp CC6 and CC7: (1)16-seg bicolor a1 a2 b c d1 d2 CC6 CC7 e f g1 g2 h i j k l m dp CONFIGURATION CHOICE Common-Cathode Drive: Digit Type a1 a2 b c d1 d2 CC6 -- e f g1 g2 h i j k l m dp 1a -- 1b 1c 1d 1dp CC6 -- 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 0x0C a -- b c d -- -- CC7 e f g1 g2 h i j k l m dp a -- b c d -- CC6 -- e f g1 g2 h i j k l m dp 1a -- 1b 1c 1d 1dp -- CC7 1e 1f 1g 2a 2b 2c 2d 2e 2f 2g 2dp 0 0 1 0 See Table 40. See Table 39. See Table 38. 0 1 *7-segment digits can be replaced by directly controlled discrete LEDs according to settings in the decode mode register (Table 11). **The highlighted row is used in Typical Operating Circuit 1 for display digits 6 and 7. ______________________________________________________________________________________ 35 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Typical Operating Circuits 3.3V V+ V+ V+ 47F 100nF GND GND GND O0 O1 O2 O3 O4 O5 O6 O11 O12 O13 O14 O15 O16 O17 O18 O0 O1 a b c d e f g dp Rcc Gcc DIGIT 0b (RED), DIGIT 1b (GREEN) 7-SEGMENT BICOLOR LED O2 O4 O5 O6 O8 O9 O10 O7 a b c d e f g dp MAX6955 O7 O8 O9 O10 O0 O4 O5 O6 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O2 O3 SCL AD0 AD1 SDA O11 O12 O13 O14 O15 BLINK O16 O17 OSC_OUT O18 P0 OSC P1 P2 CSET RSET ISET P3 P4 a b c d e f g1 g2 h i j k l m dp Rcc Ccc DIGITS 2 AND 3 14-SEGMENT BICOLOR O1 O0 CC1 CC0 DIGITS 0a AND 1a 7-SEGMENT MONOCOLOR O0 O2 O3 O4 O0 O2 O3 O4 O0 O1 O2 O3 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O5 a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 5 16-SEGMENT MONOCOLOR O5 O8 O9 O10 O5 O8 O9 O10 O11 O12 O13 O14 O11 O12 O13 O14 O15 O16 O17 O18 O6 DIGIT 6 4 x 4 MATRIX OF DISCRETE MONOCOLOR LEDs O15 O16 O17 O18 O7 DIGIT 7 4 x 4 MATRIX OF DISCRETE MONOCOLOR LEDs O0 O1 O2 O3 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O4 a1 a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 4 16-SEGMENT MONOCOLOR 36 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Typical Operating Circuits (continued) 3.3V V+ V+ V+ 47F 100nF GND GND GND O0 O1 O2 O3 O4 O5 O6 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O0 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 0 O0 O1 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O2 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 2 O0 O1 O2 O3 O6 O6 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O4 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 4 O0 O1 O2 O3 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O5 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 5 O0 O1 O2 O3 O4 O5 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O6 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 6 O0 O1 O2 O3 O4 O5 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O7 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 7 O0 O1 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O3 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 3 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 O12 O13 O14 O15 O16 O17 O18 O1 a a2 b c d1 d2 e f g1 g2 h i j k l m dp cc DIGIT 1 MAX6955 O7 O8 O9 O10 SCL AD0 AD1 SDA O11 O12 O13 O14 O15 BLINK O16 O17 OSC_OUT O18 P0 OSC P1 P2 CSET RSET ISET P3 P4 ______________________________________________________________________________________ 37 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan MAX6955 Pin Configurations TOP VIEW P0 P1 AD0 SDA SCL AD1 O0 O1 O2 1 2 3 4 5 6 7 8 9 36 P4 35 P3 34 P2 33 OSC_OUT 32 BLINK 31 O18 30 O17 29 O16 P0 1 P1 2 AD0 3 SDA 4 SCL 5 AD1 6 O0 7 O1 8 O2 9 O3 10 O4 11 O5 12 O6 13 O7 14 O8 15 N.C. 16 GND 17 GND 18 ISET 19 40 P4 39 P3 38 P2 37 OSC_OUT 36 BLINK 35 O18 34 O17 33 O16 32 O15 MAX6955AAX 28 O15 27 O14 26 O13 25 O12 24 O11 23 O10 22 O9 21 V+ 20 OSC 19 V+ O3 10 O4 11 O5 12 O6 13 O7 14 O8 15 GND 16 ISET 17 GND 18 MAX6955APL 31 O14 30 O13 29 O12 28 O11 27 O10 26 O9 25 N.C. 24 V+ 23 V+ 22 OSC 21 V+ SSOP GND 20 PDIP Chip Information TRANSISTOR COUNT: 55,529 PROCESS: CMOS 38 ______________________________________________________________________________________ 2-Wire Interfaced, 2.7V to 5.5V LED Display Driver with I/O Expander and Key Scan Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) SSOP.EPS MAX6955 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 39 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. |
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